A Clock less, Multi-Stable, CMOS Analog Circuit. An Improved Design of Key Analog Circuits in CMOS Image Sensor Frequency Compensation...

1.      FPGA implementation of LDPC bit-flipping algorithm using Co-simulation. 2.      FPGA implementation of LDPC Decoder using min-sum a...

ALU in FINFET VARIABLE TAPER CMOS BUFFER DESIGN Sleepy Keeper Approach for Power Performance Tuning in VLSI Design. 0-9 bit pattern rec...

   Common source amplifier.    Flash ADC Architecture using Multiplexers to Reduce a Preamplifier and Comparator Count.    Design of SRA...

Silicon Mentor is one of the best research entities in India. To make an environment of research we are providing our services in research...

Partially reconfiguration means changing the FPGA partially or only the selected part of the FPGA is reconfigured. It can be done in two ...

PhD research is the highest level of academic research conducted in universities and institutes throughout the World. The methods used...