Silicon mentor is a hub to guide & backup the Mtech. and PhD students at the time of pursuing their major & mini projects in semiconductor and communication domain. we boost the students in thesis preparation and provide a technical platform for research in the era of VLSI,Embedded Systems, Communication, Semiconductor, Biology and Technology Interface and Electrical and Electronics. Students may also reach us if they are willing for industrial tool specifications such as cadence orcad,Xilinx FPGA implementation(VHDL Verilog HDL),Tanner EDA,Advance Design System(ADS),AVR studio,MATLAB,H-spice,P-spice,Modelism,Network simulator2,Proteaus and many more to follow. Major projects in VLSI & ECE.
The focus research area in which Silicon Mentor provide services is Neural Network, DSP, Video processing, Advance Analog, Low Power Circuit Technique, Standard cell ( Sub-threshold ).
VLSI Projects : Basically VLSI has two phases i.e. Front End & Back End.
VLSI Front End Projects: Front End includes the digital designing,RTL design(Register Transfer Level),simulation and Design Under Test(DUT) techniques.It consist of various key terms such as verilog,system verilog,SVA,OVM,UVM,PERL,TCL etc. It comprises of concepts like clock,setup & hold time,FSM and RTL optimization. It uses tools like Questa Sim,Modelism,GTK wave,Xilinx,Icarves Verilog.
VLSI Back End Projects: Back End includes the design verification and fabrication of a digital design. The verification field is a vast and developing filed of semiconductor in India.The verification of a digital design requires highly skilled semiconductor engineers for verifying a digital design. The process of verification is repeated 15-20 times to prevent errors in the design of a particular chip. Tools used in VLSI Back End design are Tanner EDA, Advance Design System-ADS, Magic, SPICE(H-SPICE, P-SPICE,T-SPICE).
Here are some Projects List which you can see :