What is ‘SETUP and HOLD’ time concept?

Gates is referred as the basic building blocks of combinational logic circuits. However there are XOR, NAND, NOR, XNOR gates too but particularly AND, OR, and NOT gates are used. Similarly, Flip flops are referred as the basic building blocks of sequential circuits. Flip flops are clock based devices. One bit is stored by each flip flop.

There are restrictive time regions around the clock for every flip flop. Input should not change in these time regions. These regions are called restrictive because by changing the input in this region the output is not sure, it may or may not be the one you expected. 

Output is derived from either the new input, the old input, or may be in between these two. The two most important terms in the digital clocking are defined below.

Setup and hold time.

• The setup time is the time interval just before the clock where the data must be remain stable. Other definition is, “SETUP time is the minimum time before the clock's active edge that the data must be stable to be latched correctly in this period of time. It may cause incorrect data to be captured, if there is any violation, which is known as setup time violation.



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• The hold time is the time interval after the clock where the data must be remain stable. It may cause incorrect data to be latched if there is any violation, which is known as a hold time violation.

• Remedies for setup time violation:
  •    Optimize the combinational logic between the flip-flops to get minimum delay.
  •    To get lesser setup time, redesign the flip-flops.
  •    Play with clock skew (useful skews).
  
  Remedies for hold time violation :

          •    Use buffers to add delays

         .•    lockup-latches can be added (basically to avoid data slip).  

                                                                                                              Author - Poornima Sharma

                                                                                                              (Intern Design Engineer)                                            

The Future of Very Large-Scale Integration (Conti…) - Flexible electronics

 Flexible electronics: Distributed large area (cm2-to-m2) electronic systems based on flexible thin-film-transistor (TFT) technology are drawing much attention due to unique properties such as mechanical conformability, low temperature process ability, large area coverage, and low fabrication costs. Various forms of flexible TFTs can either enable applications that were not achievable using traditional silicon based technology, or surpass them in terms of cost per area. Flexible electronics cannot match the performance of silicon-based ICs due to the low carrier mobility. Instead, this technology is meant to complement them by enabling distributed sensor systems over a large area with moderate performance (less than 1 MHz). Development of inkjet or roll-to-roll printing techniques for flexible TFTs is underway for low-cost manufacturing, making product-level implementations feasible. Despite these encouraging new developments, the low mobility and high sensitivity to processing parameters present major fabrication challenges for realizing flexible electronic systems

Fig.1- Flexible Chip

CMOS scaling is coming to an end, but no single technology has emerged as a clear successor to silicon. The urgent need for post-CMOS alternatives will continue to drive high-risk, high-payoff research on novel device technologies. Replicating silicon’s success might sound like a pipe dream. But with the world’s best and brightest minds at work, we have reasons to be optimistic.

    Application in Biomedical

                                             

Application in Media

                    

Tags : Future of VlSI                        Flexible electronics                      CMOS                     PMOS         

Author - Akash Kumar

(Design Engineer at Silicon Mentor)