Showing posts with label DSP. Show all posts
Showing posts with label DSP. Show all posts

Tuesday, March 10, 2015

An Edge to VLSI Implementation of Digital Signal Processing Algorithms



The implementation of digital signal processing algorithms and availability of the digital systems have become more widespread since last two decades due to easy availability of digital systems. Earlier analog processors were used to perform the signal processing due to unavailability of digital processors.

The digital signal processing became feasible to be performed in real time in the recent times due to hardware implementation of the algorithms developed in signal processing. It is all because of the requirement of higher level computations in the signal processing especially for the real time applications.

The demands for the high level computation systems combined with the performance of the VLSI architectures which led to the development of VLSI Digital signal processors such as TMS320(1982) and DSP56001(1987). The developers are left with enormous specific architectures of DSP with the ease in development of VLSI designs.

The most common and usually employable DSP techniques are the FFT computing, FIR and IIR digital filters. These techniques require the three basic operations i.e. multiplication, storage and addition and these operations can easily be performed with the VLSI oriented architectures for Digital signal processing architectures. 

The architectures developed through the VLSI implementation for DSP applications generally make use of parallel processing, multiprocessing, array processors, RISC i.e. Reduced instruction set and  pipelining for the very high processing.

The architectures developed for the Digital signal processing applications are tested and brought to the real time implementation through VLSI only. The most commonly and preferably used hardware for the implementation of DSP algorithms in VLSI is the FPGA. FPGA implementation of the digital signal processing algorithms makes it possible to develop a VLSI architecture for the high computation processing and multiprocessing at the real time.

Wednesday, March 4, 2015

Bio-Medical Signal Processing at a Glance



ECG signal:


ECG signal, also known as EKG signal, is a diagnostic tool which makes the electrical and muscular function of the heart accessible for analysis. The continuous pumping of blood by heart from lungs to various parts of body is responsible for generation of ECG signal.  The heart is a two stage electrical pump and its electrical activity can be measured by placing the electrodes on the chest or by using some special bands. The electrocardiogram is used to measure the rate and rhythm of the heartbeat, as well as it provides an evidence of blood flow to the heart muscles.

                              
                                                                                       Fig1 ECG signal

Introduction:



For ECG signal analysis we perform Signal Processing on it. With the help of the signal processing we can extract that information from the ECG signal that we cannot extract by simply visualizing it. Many noises may add into our ECG signal and elimination of these noises is also the important objective of the Signal processing. And another main objective of the signal processing is to do the compression of the data. The following diagram shows the algorithm for basic ECG signal processing:

             
                                                          Fig2 Algorithm for basic ECG signal processing

After getting the information by the signal processing, we can use this information in many applications.

ECG Pre-Processing:


Filtering is done in Pre-Processing part of the ECG signal and after filtering, various analyses are performed on the ECG signal. Filters are mainly designed for the removal of the following:

  • 1      Baseline wander
  • 2      Power line interference

Baseline wander:
The main factor require for designing the linear, time-invariant, high pass filters for removal of baseline wander is cutoff frequency and phase response characteristics In definite situations, baseline wander becomes commonly well-defined at higher heart rates such as during the final stages of a stress test when the workload increases. Then, it may be advantageous to couple the cut-off frequency to the general heart rate, rather than to the lowest possible heart rate, to further improve baseline removal.

Figure 3(a) shows Electrocardiographic baseline wander because of sudden body movements. The amplitude of the baseline wander is considerably larger than that of the QRS complexes .Figure3(b)  a close-up in time (10 x) of the ECG signal framed in (a)


Power line Interference:

Electromagnetic fields generated by a power line signify a common noise source in the ECG that is characterize by 50 or 60 Hz sinusoidal interference, probably accompany by a number of harmonics. Such narrow band noise makes the analysis and interpretation of the ECG more difficult, as the description of low-amplitude waveforms becomes unpredictable and fake waveforms may be introduced.

4 QRS Detection:


The information content present in any ECG signal is its existence and its time of occurrence. The QRS complex present in ECG signal indicates the existence of beat in the signal. Also many other analyses of human body like pulse rate, blood pressure measurement, physical and mental status etc can be performed after detection of QRS peak. Thus, proper detection is of utmost requirement which ensures that refined and distortion less signal will be further used by system for human body analysis. The poor detection can lead to limitation in performance of whole system.

The two problems frequently faced in QRS detection are that the signal either remains undetected or signal is detected falsely. The problem of more concern is no detection, because the information content from that part is lost and cannot be recovered in later stages of the system. For false detection of signal, there are various methods to resolve it like performing classification of QRS morphologies. The detector must be capable of detecting different morphologies to allow sudden changes in the output i.e. it should not lock onto certain types of rhythm, but treat each event as if it could occur at almost any time. The noises also accompany the detected signal. These noises may be transient in behavior or persistent. 

                                     
                                                          Fig Block diagram of QRS Detector


The above figure shows the block diagram of a commonly used QRS detector. The input to system is the ECG signal, and the output is a series of occurrence times of the QRS complex signal. It is a must requirement to improve the resolution using an algorithm which is responsible for time alignment of the detected signal. Time alignment helps in elimination of smearing which occurs during computation of the ensemble average of several detected beats.