VLSI Projects

Very Large Scale Integration (VLSI) describes about the semiconductor integrated circuits which are composed of hundreds of thousands of transistors in a chip. It provides high computational speed with minimum power dissipation, minimum chip area and lower cost. Frontend and Backend domain contains all the design steps of a VLSI chip from system level to layout level. SiliconMentor is the innovative technical group that works in both domains to cover the vast field of VLSI. According to the MRD, a new VLSI chip idea built up for the people requirements. This idea propagates to Frontend technical teams and they start implementation of the project using HDLs. They design RTL level and logic level of the required project. After that Frontend verification is required to check the design specifications using System Verilog. If it passes all the verification successfully then the project further propagates to the Backend group. They perform their task from circuit level to the layout level using various tools such as Cadence Virtuoso, Tanner, and ADS etc.  And verification at backend level is also required to check that specifications. So according to requirements, we have various VLSI project domains such as Digital, Analog VLSI projects, DSP VLSI projects , Communication VLSI projects  and FPGA in  Frontend and Backend projects. SiliconMentor project guidance covers Verilog and System Verilog language, tools like Model_sim, Questa_sim, Xilinx ISE, MATLAB Simulink, Tanner (S-edit, L-edit), ADS, H-Spice, P-Spice, Cadence Orcad and Micro wind. SiliconMentor also works at sub-device level using COMSOL Multiphysics.

                                                         Author- Deepak Berwal
                                                   (Research Associate at Silicon Mentor)

vlsi projects

Tags : VLSI Projects , M.Tech Projects, IEEE Projects , MATLAB Projects , VLSI Projects Training , PhD Projects

Design of a Combo Echo and Crosstalk Canceller in One Unit

In purposed design, we are going to design two transmission line. Now through these transmission lines, we will pass two mono signals, outputs of workspace. Then generate a stereo signal, result of crosstalk between these two transmission lines. To generate crosstalk, we are connecting these two transmission lines via a capacitor.
Now, we will first try to remove the echo from our received signal, to get echo free desired signal. And for this purpose Adaptive filter came into action. Now further main dominating factor i.e. crosstalk will also be removed.
Our design is capable of cancelling crosstalk along with echo in NEXT and FEXT, in case of DSL, VDSL, and ADSL communication system.

Author - Rahul Bhardwaj

(Research Associate at Silicon Mentor)

echo n crosstalk canceller in one unit