Low Power Digital VLSI Projects List

• ALU in FINFET
• VARIABLE TAPER CMOS BUFFER DESIGN
• Sleepy Keeper Approach for Power Performance Tuning in VLSI Design.
• 0-9 bit pattern recognition circuits using neural network, 3-bit pattern recognition.
• An adaptive Pulse-Triggered Flip-Flop for a High-Speed and Voltage Scalable Standard Cell Library.
• Lewis grey comparator.
• 4×4-Bit Array Two Phase Clocked Adiabatic Static CMOS Logic Multiplier with New XOR.
• Adiabatic Logic Based Low Power Multiplexer and De-multiplexer.
• Low Power D-latch design using MCML Tri-state Buffers.
• Ultra Low Power NAND Based Multiplexer and Flip flop.
• MOS Current Mode Logic Realization of Digital Arithmetic Circuits.
• 0-0\9 digit pattern recognition circuit using neural network.
• 6 transistors XOR and XNOR using FINFET.
• Winner Take All Circuits of O (n) Complexity.
• Low power adiabatic booth multiplier using Positive feedback adiabatic logic (PFAL).
• Transmission gate based full adder in deep sub-micron technology.
• Low power radix-4 booth multiplier using GDI logic.
• High performance nibble multiplexer using modified adiabatic logic.
• Sense energy recovery full adder working in sub-threshold region of operation.
• Clock gated 4-bit Johnson counter using low power JK flip flop.
• A Low-Power Level Shifter With Logic Error Correction for Extremely Low-Voltage Digital CMOS LSIs.
• New Low-Power Techniques: Leakage Feedback with Stack & Sleep Stack with Keeper.
• Low Power, Delay Optimized Buffer Design using 70 nm CMOS Technology.
• Clock gated 4-bit Johnson counter using low power JK flip flop.
• Design of a novel low power 8-transistor 1-bit full adder cell.

If you need any suggestion or research guidance for Low Power Digital VLSI Projects then feel free to contact us.

Analog VLSI Training and projects

There is a huge demand of VLSI engineers in analog and mixed signal domain. The experts of these domains are highly paid in comparison to the other experts of different technology domains.

Silicon Mentor has designed course to train and develop a standard in the field of Analog VLSI design. Silicon Mentor is a group of VLSI engineers and researchers who are working on different VLSI domains like fronted VLSI Design and Backend VLSI Design. Silicon mentor is the only entity in India which is providing training in backend especially in Analog VLSI design. We do not believe only in theoretical knowledge that is why we provide a series of experiments on different analog VLSI projects. We have executed different analog, mixed signal and other projects using different spice models.

We uses different technology file to execute the analog experiments, some of them are as: TSMC 180nm, 130nm, IBM 90 nm PTM model cards up o 45 nm etc. There are different step wise and steps phase of Analog VLSI training and projects. These all phases are designed in accordance of the current VLSI industry requirements.     

VLSI

Tag : Analog VLSI Training    VLSI Projects   VLSI Design    VLSI Training in Delhi Ncr  VLSI Research 

                                                                                                         Author - Dinesh Chauhan

                                                                                                       (Research Associate at Silicon Mentor) 

Verilog Training in Delhi - NCR

Today, we had got the easiest approach for analyzing our hardware description circuit virtually before doing fabrication on PCB’s. Verilog is one of the weapons to resolve this problem and very interesting way to design our circuit. Verilog is one of the hardware description languages which are very easy to implement the desired functionality in the form of the virtual hardware circuit, but we have also had options to check whether the design is working properly or not. Through the process of simulation, we can easily see that after providing inputs we are getting the desired output or not in the simulation window. We can easily see the wide range of Verilog applications. Verilog is not only simply the hardware descriptive language, but one of the easiest approaches for designing task regarding any fields such as communications, digital signal processing or simply mathematics. The ones we come to know, what task we have to perform, it doesn’t matter to which field it is related we can design the whole package on a just small piece of silicon by just writing few Verilog lines.

 Author - Rahul Bhardwaj

(Research Associate at silicon mentor)

verlog training in delhi-NCR


Tags : VLSI Training in delhi-ncr , Backend Training institute in VLSI, Frontend VLSI training , MATLAB Projects Training 

VLSI Projects

Very Large Scale Integration (VLSI) describes about the semiconductor integrated circuits which are composed of hundreds of thousands of transistors in a chip. It provides high computational speed with minimum power dissipation, minimum chip area and lower cost. Frontend and Backend domain contains all the design steps of a VLSI chip from system level to layout level. SiliconMentor is the innovative technical group that works in both domains to cover the vast field of VLSI. According to the MRD, a new VLSI chip idea built up for the people requirements. This idea propagates to Frontend technical teams and they start implementation of the project using HDLs. They design RTL level and logic level of the required project. After that Frontend verification is required to check the design specifications using System Verilog. If it passes all the verification successfully then the project further propagates to the Backend group. They perform their task from circuit level to the layout level using various tools such as Cadence Virtuoso, Tanner, and ADS etc.  And verification at backend level is also required to check that specifications. So according to requirements, we have various VLSI project domains such as Digital, Analog VLSI projects, DSP VLSI projects , Communication VLSI projects  and FPGA in  Frontend and Backend projects. SiliconMentor project guidance covers Verilog and System Verilog language, tools like Model_sim, Questa_sim, Xilinx ISE, MATLAB Simulink, Tanner (S-edit, L-edit), ADS, H-Spice, P-Spice, Cadence Orcad and Micro wind. SiliconMentor also works at sub-device level using COMSOL Multiphysics.

                                                         Author- Deepak Berwal
                                                   (Research Associate at Silicon Mentor)

vlsi projects

Tags : VLSI Projects , M.Tech Projects, IEEE Projects , MATLAB Projects , VLSI Projects Training , PhD Projects

DESIGN & COMPARISON OF CONVENTIONAL TPG & LP-TPG USING BRAUN ARRAY MULTIPLIER AS CIRCUIT UNDER TEST

Here, we are introducing a LP-TPG (i.e. Low Power Test Pattern Generator, using Low Frequency Shift Register). Also we’d designed a conventional TPG. Now we will use Braun Array Multiplier, using both Ripple carry adder as well as Kogge stone adder. Now in our design, we’ll use outputs of both the test pattern generators as an input to both kinds of multipliers. Our whole architecture has being designed and simulated using MODELSIM SE 6.5 & synthesised on XLINX ISE DESIGN SUITE 13.3. Till now, we are getting four simulation windows as shown below, according to our design model. Further we are trying to implement our whole design on another software QUARTUS II 13.1. So as to analysis that power consumption i.e. static power, dynamic power, on chip power, off chip power in case of LP-TPG will be less than conventional TPG.

 Author - Akash Kumar

       (Research Associate at Silicon Mentor)

Simulation window – Conventional TPG is connected to Braun Array Multiplier, using Ripple carry adder.

Simulation window – LP-TPG is connected to Braun Array Multiplier, using Ripple carry adder.

Simulation window – Conventional TPG is connected to Braun Array Multiplier, using Kogge stone adder

Simulation window – LP-TPG is connected to Braun Array Multiplier, using Kogge stone adder

Need for IEEE VLSI Projects

IEEE (Institute of Electrical and Electronics Engineers) is an advanced innovation and technical group of engineers, scientists, developers, physicists, medical doctors and researchers around the world. It has established on 1^st  January, 1963 with the merging of societies AIEE (American Institute of Electrical Engineers) and IRE (Institute of Radio Engineers). IEEE is the world’s largest technical professional association which has now many fields such as electronic, electrical, communication, computing, nanotechnology, bioengineering and robotics. Now IEEE serves 38 societies, transactions, 130 journals and 300 conferences anually. IEEE prefers exact experimental research in specific areas. Research is most important for the student, researcher, professor and engineer. Without research, all those has nothing new to deliver to the world. Studies after the graduation means research. 21^st centuries research is mainly focused on electronics because modern technological world,involves electronics to make things smart and fast. VLSI (Very Large Scale Integration) is the core domain of electronic semiconductor circuits. IEEE research in VLSI is the need of electronic world. Electronics can not move further without a research in VLSI.So IEEE VLSI projects and research papers are needed for the M.Tech and Ph.D students. VLSI is most innovative and interesting field in electronics. VLSI has mainly two types of design steps: Frontend and Backend. In frontend, we design the system and RTL level using HDLs according to the specification of projects or IC and in backend, we design logic, circuit and layout level of the projects. M.Tech, Ph.D and industrial VLSI projects should be new technological oriented to create new electronics world for the upcoming generation.

           Author - Deepak Berwal

           (Research associate at Silicon Mentor)

Click on the links to get the following Projects list :  

  

VLSI projects       Antenna Projects             MATLAB Projects

Design a Single Precision Floating Point Unit

A single precision floating point unit in verilog is introduced. The novelty of a single precision floating point unit is to provide five arithmetic operations: addition, subtraction, multiplication, division, and square root. In top-down design approach, four arithmetic modules: addition/subtraction, multiplication, division, and square root are combined to form a single precision floating point unit. Each module is independent from each other. The modules are realized and validated using verilog simulation in the Modelsim SE 6.5 and synthesis using Xlinx ISE Design Suite 13.3.

The single precision floating point unit implemented, is a 32-bits processing unit which allows arithmetic operations on a floating point numbers. The floating point unit complies fully with IEEE 754 standard.

Author - Akash Kumar 

(Research Associate at SiliconMentor)

single precision Floating Point

Levels Of IC Design

The design of integrated circuits (IC) contains the different levels of abstraction . According to the IC design standards we can study the complex circuits at following four levels.

1). Device Physics Level  2). Transistor Level  3). Architecture Level  4). System Level

1). The device physics level describes the device internal behaviour for electric field and charge.

2). Transistor level consist of a group of these devices .

3). Architectural level defines a unit of several building blocks to perform a certain functions.

3). System level consist of the set of subsystems.e.g.  ADC, DAC etc.

In conclusion  one may say that in today's IC industry above four levels are essential to achieve a high performance and low cost device. 

                                                

                                                          

Mtech projects, Vlsi designing institute in india, mtech. Paper publication, mtech. Projects guidance,  M.tech Research projects, ieee projects, ieee projects for ece

Single Electron Transistor

Single Electron Transistor is a future technology that is going to be revolutionize the current digital data storage technologies. As the name suggest it uses a single electron to carry or amplify current.Its capability makes it very useful for the high operating speed and low power consumption.

This  single electron transistor uses the controlled electron tunneling to amplify the current. It is made up of  two tunnel junctions to share a common electrode. This tunnel junction structure consist of the two metal pieces. These metal pieces are separated by an insulator of near about 0.998 nm length.

Some of its future application are as follows:

1). Ultra-sensitive Microwave detector

2). Super-sensitive Electrometer

3).Charge Sensor

4).Single Electron Spectroscopy etc

IEEE Projects IEEE Projects for ECE VLSI Projects M.tech paper publication M.tech Research projects  Mtech projects

Research work at IEEE level

IEEE has become a de facto standard for professors and research scholars working on emerging technologies and applied science. The organization provides an active platform were the latest inventions and trends are discussed and published. IEEE has promoted research at every level from institutional to professional to bring it up to a level.

At institutional level students pursuing graduation, post graduation or doctorate are highly involved in research on specific topics. The topic of research is selected by the candidate depending upon his area of interest and recent work being carried out or completed in that field. Which may be found out in technology or science journals being published by pioneers like IEEE, Elsevier, Springer etc.

Research needs dedication and complete involvement from the point when one starts looking for the topic of interest, after which he/she looks for research papers on the topic which student uses as base papers for the research. These base papers are easily available at IEEE explore, the biggest digital library of research papers. Thorough study of IEEE base paper is very essential to understand the basic idea and concept behind the work presented in the paper and the references. The other prerequisite for a high level of research is proper guidance for the research. That’s why every student is required to work under a highly qualified guide. The guide is supposed to help student to visualize and analyze every aspect his/her research interest so that the student is able to come up with an improvement in previous concept or an innovation in the domain.

Tags: vlsi projects , M.tech projects, Ieee projects, Mtech projects for ece , mtech. Paper publication, Mtech. Projects guidance