Showing posts with label embedded system summer training. Show all posts
Showing posts with label embedded system summer training. Show all posts

Thursday, July 31, 2014

FPGAs: What makes them programmable?


It sounds crazy when you say there is a device called FPGA that might replace ASIC. Definitely it will be a great achievement for the electronics engineers if they can make a hardware which can be used for all the electronic devices. Field Programmable Gate Array (FPGA) specifies that  it can be configured by costumer or designer after manufacturing. Hardware description languages (HDLs), such as VHDL and Verilog are used to implement the logic.


FPGA



FPGAs have mainly four elements viz. CLBs, Interconnects, BRAMs and IOBs which makes them programmable.  Configurable Logic Blocks (CLBs) are the main weapons to make device programmable. CLBs are made up of LUTs, flip-flop and a 2:1 mux. 

FPGA




Look UP Tables (LUTs) are made up of small BRAMs that can implement any logic function. Each of inputs is essentially an address for the BRAM so that it can define the output logic to the block. 2 inputs LUT can become any logic gate. LUTs are then connected to the DFF which are the memory elements used to store the output from LUT. A 2:1 MUX is used in case you want to bypass the DFF (D-Flip-flop). Each logic block can connect through the Interconnects to their corresponding block to implement the desired logic. IOBs are used as an interface to the outer world. 

(Research Associate at Silicon Mentor)

 

Tuesday, July 29, 2014

FPGA Vs ASIC

FPGA- Field Programmable Gate Array    |    ASIC- Application Specific Integrated Circuits

This has become the most prominent discussion in VLSI industries and amongst VLSI engineers that if FPGAs can overtake the ASICs or not. FPGA is considered as a substitute of the ASIC and various research and development teams are working on proving it, but certain parameters are kept into consideration before making such comparisons in the technology i.e. performance , flexibility , power consumption and cost of the device.
If we talk about an FPGA then there is no doubt that it’s a revolutionary product if it can be proved an alternate to the ASICs as it has faster time to market because it is independent of the manufacturing steps like masking and layout etc. One just needs to burn the codes on readymade FPGA kits and we are done.
Apart from that there are some more factors on which FPGA beats an ASIC viz. reusability, design cycle, logic density and field programmability. An FPGA can be reprogrammed at no cost basis and a second is more than enough to reprogram an FPGA but an ASIC can take thousands of dollars and a bunch of time to reprogram or it cannot be reprogrammed.
There are a number of facets where FPGA lags behind an ASIC such as power consumption, limited design size, not fit for the production in bulk and most importantly the cost of an FPGA kit is much higher than an ASIC which helps an ASIC to put behind an FPGA as cost is the most prior and vital factor for an electronic industry.
Now, when the discussion goes round about then if isolated the manufacturing steps and cost then an ASIC would be of great use and vitality for the VLSI industry and for whole electronic industry. ASICs can be produced in bulk and operates at very low power compared to FPGAs and due to design flexibility of an ASIC it gives an enormous speed than the FPGAs, but the tools required for the designing of ASICs are available at higher or mammoth cost.
The fact cannot be neglected that even if the FPGA replaces an ASIC then what really is an FPGA made up of?
It is only an ASIC which is comprised in an FPGA kit. So, without an ASIC we cannot even think of the FPGAs. Every technology has its own merits and demerits but the real technology is what meaningful we extract from that particular technology that can be used for the welfare of humans and others.

Author - Aman Jangra
(Research Associate at Silicon Mentor)


FPGA Vs ASIC


Friday, July 25, 2014

MATLAB PROJECTS RESEARH GUIDANCE AND TRAINING IN DELHI-NCR

MATLAB refers to the Matrix Laboratory which includes the math works with an integration of computation, visualization, and programming or MATLAB can be expressed as an interface between user and algorithms. MATLAB has become a tool of preference for the industries and academia due to its vitality in the electronics and related facets.

Most of the B.Tech colleges and universities do not emphasize on the MATRIX laboratory due to lack of MATLAB acquaintance with them and as a consequence of this the students gets deprived of the MATLAB concepts. After the completion of B.E/B.Tech students finds themselves running after the various institutes and training centers for the MATLAB training and other certified courses in MATLAB and same is the case with M.Tech students. However it becomes worse for the M.Tech students who are assigned with the MATLAB projects as an academic project for the fulfillment of university criteria.

So, the importance of MATLAB cannot be neglected when it comes to the engineering and instrumentation. Apart from the academics the students can opt for the training and research guidance on MATLAB projects and IEEE MATLAB projects along with the conceptual and advanced tool training at SiliconMentor which is known for its quality of work in the Delhi/NCR and entire northern INDIA.
SiliconMentor not only directs and assist the students in MATLAB projects but also advancing in VLSI domain of ECE and other sub-domains viz. Analog Design, Digital Design and Verification, Antenna and Digital Communication etc and also for the PhD research projects in VLSI and MATLAB. We SiliconMentor team delivers the work with full justifications and try to forward the work of associates up to patent level and gives an opportunity to the students and professors to own the patent of their work

Author - Aman Jangra
(Research Associate at Silicon Mentor)

MATLAB Projects Training   





Tags : VLSI Projects Training , M.tech Projects Training, MATLAB Projects Training , VLSI Backend Training Institute

Wednesday, July 23, 2014

Design Of an Echo Canceller using adaptive filter with LMS technique


In this particular project, we had introduced a concept of LMS (i.e. least mean square) in the adaptive filter designing. And finally, this particular adaptive filter is used in our communication system such as to cancel the generated ‘ECHO’, during process of communication between transmitter and receiver. It has been observed that this particular “Echo canceller” is very successful in reducing the undesired signal beside the upcoming speech signal form the transmitter end to the receiving end.

Beside the adaptive filter using the least mean square technique, one more component is also used within our design i.e. Vocoder. All these above discussed architecture is designed on MATLAB. 

Author - Rahul Bhardwaj
(Research Associate at Silicon Mentor

Acoustic echo cancellation setup using an adaptive filter




Sunday, July 20, 2014

Implementation of FFT in decimation in time in verilog-

The Fast Fourier transform (FFT) is an algorithm that efficiently computes the discrete Fourier transform(DFT). In this particular implementation of FFT, which is capable of computing the fast Fourier transformation in case of decimation in time, when the number of inputs are eight.

In this particular design, implementation is done on the software Modelsim SE 6.5, using the hardware descriptive language verilog for designing. Furthermore using the concept of Folding as well as Retiming,
we can easily reduce the number of registers used in the normal FFT.

Difference can be easily seen as below :
(A.)FFT (without Folding & Retiming)



 Now, below is simulation window- FFT in DIT


(B.)FFT (with Folding & Retimin






  

Simulation window – FFT in Decimation in time


Author - Akash Kumar 
(Research Associate at Silicon Mentor)


Tags : Verilog Training in delhi - ncr , VLSI training in delhi NCR ,  M.tech final year Projects Guidance and supports