M.tech Research Projects guidance

Members of Silicon Mentor realise the importance of Mini and Major project that a M.tech student has to undertake and complete to comply as a curriculum pre-requisite. It specially has more significance for M.tech students or PhD students as they need to present a feasible study and simulation results on new design strategy adopted along with performance parameter analysis to substantiate their strategy.

This is how we at Silicon Mentor guide and help students in executing such research projects:

·         Discussion with candidate on sub-domain and subject matter;

·         Selecting a IEEE based topic and explaining the candidate of the underlying concept and exact identification of the problem statement;

·         Assisting synopsis preparation and verifying that it is aligned with problem statement and mentioning the logic that will be adopted to overcome the problem;

·         Searching the closest base paper and other closest prior art through research databases and other technical forums ,such as, IEEE, Research gate, Scribd , to name few and assisting students in chalking out the design strategy;

·         Periodic checking on the WPR (Weekly Progress Report) and the presentations indicating the project implantation flow;

·         Project Training on required tool so that the student can simulate and prove the base paper and study the dependency of circuit or its equivalent functional model on different parameters;

·         Deriving the student out of his comfort zone to develop out of the box thinking while resolving problems abstract as well as tangible, encountered during project execution;

·         Nourishing the ideas of the student and channelizing the ideas to obtain final results (complete the research).

Though we have started recently, we have made quick and innovative strides as in guiding 60 graduate and post graduate research students in sub micron layout, pre-silicon characterisation as part of their research projects in compliance with curriculum requisites, trained more than 45 students in basics and advanced methodologies and tools of VLSI and associated domains.

Author - Varinder Josan 

(Research Associate at Silicon Mentor)

Tags : M.tech Projects , M.tech Paper Publication , M.tech projects Guidance and supports , ieee M.tech Projects .

VLSI Projects

Very Large Scale Integration (VLSI) describes about the semiconductor integrated circuits which are composed of hundreds of thousands of transistors in a chip. It provides high computational speed with minimum power dissipation, minimum chip area and lower cost. Frontend and Backend domain contains all the design steps of a VLSI chip from system level to layout level. SiliconMentor is the innovative technical group that works in both domains to cover the vast field of VLSI. According to the MRD, a new VLSI chip idea built up for the people requirements. This idea propagates to Frontend technical teams and they start implementation of the project using HDLs. They design RTL level and logic level of the required project. After that Frontend verification is required to check the design specifications using System Verilog. If it passes all the verification successfully then the project further propagates to the Backend group. They perform their task from circuit level to the layout level using various tools such as Cadence Virtuoso, Tanner, and ADS etc.  And verification at backend level is also required to check that specifications. So according to requirements, we have various VLSI project domains such as Digital, Analog VLSI projects, DSP VLSI projects , Communication VLSI projects  and FPGA in  Frontend and Backend projects. SiliconMentor project guidance covers Verilog and System Verilog language, tools like Model_sim, Questa_sim, Xilinx ISE, MATLAB Simulink, Tanner (S-edit, L-edit), ADS, H-Spice, P-Spice, Cadence Orcad and Micro wind. SiliconMentor also works at sub-device level using COMSOL Multiphysics.

                                                         Author- Deepak Berwal
                                                   (Research Associate at Silicon Mentor)

vlsi projects

Tags : VLSI Projects , M.Tech Projects, IEEE Projects , MATLAB Projects , VLSI Projects Training , PhD Projects

Research Guidance For VLSI PhD Projects

The main motive of Doing PhD is to invent something excusive for the world. Students pursuing PhD devote four to five year to complete their thesis work which is enough to take technology forward. Research work in PhD involves in-depth identification of problem statement for respective field. One should think very carefully about the scope of research. So PhD projects selection should be highly innovative and must not be selected with the enthusiasm but to maintain the enthusiasm throughout the project until the project is finished.

Research Guidance For PhD projects

Here at SiliconMentor we provide guidance to PhD students for their research work.  We provide a suitable framework for VLSI PhD Research projects. Our research interest  cover Analog circuit design, Ultra low power VLSI design of Standard cell, Advance digital signal processing, Communication IPs, Digital circuit design,  RF & Mixed Signal Circuit design, Image & Video processing for Biomedical applications, FPGA Prototyping,  Processor architecture & bus protocol.Our effort drives us in application development and product development. We try our level best to take the PhD research work up to patent level.

We provide guidance in VLSI PhD projects, VLSI M.tech projects, MATALB PhD Projects, VLSI DSP projects for M.tech, MATLAB projects for M.tech, Analog PhD projects, DSP Projects for PhD, IEEE PhD projects and more even.

Our project support start from topic selection as per choice of students, Literature survey, and problem statement identification, tentative solution for problem, implementation of the projects, Implementation of New research approaches, tool practice and project guidance and the support continues till the final submission.

PROCESS CORNERS

Process corners refer to the process inaccuracies, temperature and other parameter variations. The simulations that are used to analyze these process inaccuracies are different from each other. The corners describe the differences of a chip behavior form its nominal condition are usually supplied with the process kit and these are originally located in model libraries.

These kit contains  corner condition for the SS, FF, TT, FS, SF etc process, where these abbreviations stands for Slow NMOS-Slow PMOS, Fast NMOS-Fast PMOS, Typical NMOS-Typical PMOS, Fast NMOS-Slow PMOS, Slow NMOS-Fast PMOS etc. These corner conditions are checked with the help of EDA or simulation process and in result it describes IC behavior. It may contain the process of temperature variation and V_dd (supply voltage) variation depends on customer IC requirement. e.g. For car manufacturing company the IC should be checked for  maximum corner conditions and temperature variations otherwise  IC will not fulfill all requirement.­­­

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Levels Of IC Design

The design of integrated circuits (IC) contains the different levels of abstraction . According to the IC design standards we can study the complex circuits at following four levels.

1). Device Physics Level  2). Transistor Level  3). Architecture Level  4). System Level

1). The device physics level describes the device internal behaviour for electric field and charge.

2). Transistor level consist of a group of these devices .

3). Architectural level defines a unit of several building blocks to perform a certain functions.

3). System level consist of the set of subsystems.e.g.  ADC, DAC etc.

In conclusion  one may say that in today's IC industry above four levels are essential to achieve a high performance and low cost device. 

                                                

                                                          

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Power dissipation in CMOS digital circuits

The growing development of CMOS logic VLSI circuits has decreased the circuit size, increased the switching speed , there is one problem associated with this technology that is known as the power dissipation . There are many researchers who are trying to decrease the power consumption of CMOS based digital circuits. The main cause of power dissipation in CMOS based VLSI circuits are divided on the basis of   its working or behavior.

There are mainly two cases of Power dissipation 1) Dynamic power dissipation 2) Static power dissipation. This dynamic power dissipation can be further divided in three parts known as switching power dissipation, short circuit power dissipation and glitching power dissipation. These can be reduced by changing the parameters of the following models:

  switching power

P _switching = α F_operating.V_dd² C_L [for full output swing]

Where F_operating is operating frequency_, V_dd = supply voltage_, C_L= Net load capacitance_, α= switching activity factor of gate.

P _switching = α F_operating V_dd. V_swing C_L [for low voltage swing]

Short circuit power

Pshort circuit = (μC_ox/12) (W/L)(V_dd-2V_th)³τ F_operating

Where  τ = rise/ fall time of the input signal

The static power dissipation occurs because of two reasons: DC current and Transistor leakage current.

   

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