Road and Lane Detection: Different Scenarios and Models

Advanced Driver Assistance Systems are an integral part of vehicles today. They can be passive, as in merely alerting the driver in case of emergencies, or actively respond by taking over vehicle controls during emergency scenarios. Such systems are expected to reach full autonomy during the next decade. The two major fields of interests in the problem are: road and lane perception, and obstacle perception. The former involves finding out road and lane markers, to ensure that vehicle position is correct, and to prevent any departures. Obstacle detection is necessary to prevent collisions with other traffic, or real-life artifacts like streetlights, stray animals, pedestrians, etc.

Problem Scope

Road and lane perception include detecting the extent of the road, the number and position of lanes, merging and splitting lanes, over different scenarios like urban, highway or cross-country. While the problem seems trivial given recent advancements in image processing and feature detection algorithms, the problem is complicated by the presence of several challenges, such as:

•    Case diversity: Due a verity of real-world parameters, the system has to be tolerant of a huge diversity of incoming parameters. These include:

1.     Lane and Road appearance: Color, texture and width of lanes. Road color, width and curvature differences.
2.     Image clarity: Presence of other vehicle, shadows cast by objects, sudden changes in illumination.
3.     Visibility conditions: Wet roads, presence of fog or rain, night-time conditions.

•    High reliability demands: In order to be useful and acceptable, the assistance system should achieve very low error rates. A high rate of false positives will lead to driver irritation and rejection, while false negatives will cause system compromise and low reliability.

Modalities Used

The state-of-the-art research and commercial systems are looking at several perception modalities s sensors. A quick view at their operation and pros-cons is presented here:

1.    Vision: Perhaps the most intuitive approach is to use vision based systems, as lane and road markers are already optimized for human vision detection. Use of front-mounted cameras is nearly standard approach in almost all systems, and it can be argued that since most of the signature of lane marks is in the visual domain, no detection system can totally ignore the vision modality. However, it must be stressed that the robustness of the current state-of-the-art processing algorithms is far from satisfactory, and they also lack the adaptive power of a human driver.

2.    LIDAR: The most emerging technology is the use of Light Detection and Ranging sensors, which can produce a 3D structure of the vehicle surrounding, thereby increasing robustness as obstacles are more easily detected in 3D. In addition, LIDARs are active sources- thus they are more illuminance adaptive. The LIDAR sensors are however very expensive.

3.    Stereo-vision: Stereo-vision uses two cameras to obtain the 3D information, which is much cheaper in terms of hardware, but requires significant software overhead. It also has poorer accuracy, and leads to more probability error.

4.    Geographic Information Systems: The use of prior geographic database together with known host-vehicle position can in effect replace the on-board processing requirement and enable worldwide ‘blind’ autonomous driving. However, the system needs very accurate positioning in terms of resolution of the vehicle position, as well as updating the geographic database in real-time with changing traffic dynamics and obstacle positions, either by satellite imagery or GPS measurements. The uncertainty in obtaining and updating highly accurate map information over large terrains has constrained it as a complementary tool to on-board processing.

5.    Vehicle Dynamics: The presence of sensors like Inertial Measurement Units (IMUs) provides insight into the motion parameters of the vehicle such as speed, yaw rate and acceleration. This information is used in the temporal integration module, to relate data across several time-frames.

Generic Solutions

The road and lane detection problem can be broken into the following functional modules. The implementation of said modules uses different approaches across different research and commercially available systems, but the ‘generic system’ presented here is present as the holistic skeleton for them.

1.    Image Cleaning: A pre-filer is applied to the image to remove most of the noise and clutter, arising from obstacles, shadows, over and under exposure, lens flare and vehicle artifacts. If training data is available or data from previous frames is harnessed, a suitable region of interest can be extracted from the image to reduce processing.

2.    Feature Extraction: Based on the required subtask low-level features such as road texture, lane marker color and gradient, etc. are extracted.

3.    Model Fitting: Based on the evidence gathered, a road-lane model is fitted to the data.

4.    Temporal Integration: The model so obtained is reconciled with the model of the previous frames, or the GPS data if available for the region. The new hypothesis is accepted if the difference is explainable based on the vehicle dynamics.

5.    Post Processing: After computation of the model, this step involves translation from image to ground coordinates, and data gathering for use in processing of subsequent frames.

Future Prospects

In concluding remarks, we can stress that road and lane segmentation are fundamental problems of Driver Assistance Systems. The extent of complexity can range from passive Lane Departure Warning systems to fully autonomous ‘blind’ drivers. The next step forward is to extend the scope of current detection techniques into new domains, and to improve its reliability. The first requires a better understanding and development of new road-scene models that can capture multiple lanes, non-linear topographies and other non-idealities successfully. The reliability challenge is harder, especially for closed-loop systems, where even small error rates may propagate. It might become essential to include modalities other than vision, and incorporate machine learning to train algorithms better.

                                                                                                   
                                                                             

ROLE OF EEG IN BRAIN TO COMPUTER INTERFACE

Brain has always been a mystery for us. We have reached moon, Everest and where not, but brain is yet to be understood completely.  We invented machines, robots to make our life simpler, but it would become simpler if we could do all those tasks just by thinking and transmitting signals from one brain to another with the help of signal processing!! That day is not far away, thanks to BCI (Brain Computer interface).

BCI is direct communication pathway between brain and an external device.  In 1924, Hans Berger was first to discover electric activity in human brain that gave an edge to the signal processing to enter into the biology.  After analyzing the interrelation between EEG’s with brain diseases, a new possibility of research of human brain through EEG opened up.

Some of the advantages EEG Signals has in BCI are that it’s non-invasive, portable and cost effective. One need not cut open the brain. Rhythmic activity in brain is influenced by level of alertness and mental state which is exploited while measuring EEG’s. Since signals are read from the surface, it also makes it prone to noise and results in poor signal resolution, blur and dispersion of the electromagnetic waves created by neurons. Still the cost and the fact that artifacts can be removed, make it top choice for BCI. However, recently using advanced functional Magnetic Resonance Imaging (fMRI) and EEG, control of the flight of virtual helicopter was demonstrated using EEG’s.

BCI is a promising technology for people suffering from paralyses. It can be used to restore mobility in paralyzed limbs. By 2000, researchers had created a thought-translation device for completely paralyzed patients which allowed patients to select characters based on their thoughts. By 2008, researchers from Belgium, Spain and Switzerland created BCI that controlled a motorized wheel chair with high accuracy but it was not perfect.

Neuro gaming is another field where using BCI, a player interacts with the console without using controller. Music and scenery is adjusted according to the mood of player judge by his EEG, heart rate and cognitive state. This allows game play to be more realistic.

Undoubtedly, BCI-EEG is a prominent technology in the signal processing domain and will bring transformation in the field of medicine and our lives.

Low Power Techniques in the FINFET

Fin type field effect transistors (FINFETs) is a new type of CMOS in VLSI. These are doubled gated device. The two gates of a FINFET can either be shorted or independently controlled for lower leakage. It has lower short channel effects (SCEs) and ideal sub threshold voltage. To make a FINFET, the front oxide is made much thicker than the side oxides in order to effectively deactivate the front gate. We call this device FINFET because the thin channel region stands vertically similar to the fin between the sources and drain regions.

There are different modes of FINFET (a) Short gate (SG) mode (b) Independent gate (IG) mode (c) Low power (LP) mode (d) A hybrid IG/LP-mode.

1.   SG Mode:In this mode both gate are shorted and we get good control over the channel length
2.   IG Mode:In this independent signals are provided to the two device gates, this will reduce the number of transistors in the circuit.
3.   LP mode:In this we are applying a low voltage to n type FINFET and high voltage to P type FINFET.
4.   Hybrid mode:It is a combination of LP and IG modes.

Different techniques for low power consumption:

a)DTCMOS: This technique reduces standby power by using the P-MOS switch with higher threshold voltage in between power supply and the circuit. It can also use N-MOS switches with higher threshold voltage in between ground and the circuit. This high threshold transistors can operate with high speed and low switching power dissipation. When the circuit is in OFF mode the high threshold transistors are turned OFF causing reduction in the sub-threshold leakage current.

b)Self Controlled Voltage Level(SVL): There are three types of SVL techniques:

•          Type-1 has an upper SVL circuit, in this we can use single P-MOS switch and n no. of N-MOS switches connected in series. The ON P-MOS connects a power supply and the load circuit in the active mode and the all N-MOS are disconnected and they are in standby mode.
•          Type-2 has a lower SVL circuit, in which we use single N-MOS switch and n no. of P-MOS switches connected in series. The lower SVL circuit not only supplies 0 to the active-load circuit through the ON N-MOS but also supplies 0 to the standby load circuit through the use of the ON P-MOS.
•          Type-3 has a combination of lower and upper SVL circuit.When the gate voltage of circuit is kept at 0, the P-MOS is turned ON while the N-MOS is turned OFF. The current is pass through the P-MOS and through the n P-MOS in the lower circuit. When control signal turns to 1 the N-MOS is turned ON and turns OFF P-MOS, power is supplied to the circuit through n N-MOS. This results in a decrease in the sub threshold current of the N-MOS that is the leakage current through the circuit decreases.

Hardware Co-simulation for Non Memory Mapped Ports using Simulink and System Generator

Hardware or FPGA is a primary requirement for any real time implementation of mathematical algorithms. The main drawback of the process is the limited resources and the interfaces available on the FPGA for the co-simulation process. One of the main highlighted concern is the mapping of the peripheral ports on the FPGA with the algorithm. 

Co-simulation is the best process to use for the real time implementation of the algorithms because the process facilitates the features of the two tools simultaneously. MATLAB is known as the best tool for the implementation of the mathematical algorithms for a number of applications. The other tool System Generator from by the Xilinx is known best for the hardware implementation of the algorithms. 

Both the tools work together simultaneously to real time implementation of the mathematical algorithms on the FPGAs. The complications are their when you want to use the LEDs, Buttons or other output devices. To resolve these problems we manually create the Non Memory Mapped Ports according to the steps given below.

To manually create NMM we need these different Simulink and system generator block sets.

1.       In1

2.       Convert

3.       Gateway In

4.       Out1

5.       Terminator

To generate the library subsystem we have to put these block as in the given fig:1

Fig: 1

The work is almost done we just need to run the given three command on the MATLAB command window after selecting the “Gateway Out” block

>>xlSetNonMemMap(gcbh, 'Xilinx', 'ethernetcosim'); 

>>xlSetPortParams(gcbh, 'IOConstraint', 'NET "pmod0" LOC = U18;');

This command is to map output of the design to the LED of the FPGA. “U18” is the pin location of the LED<0> in our case and can be changed on the basis of different pin location of the FPGAs.

>>dump(xlGetPortParams(gcbh));

This command is to confirm the pin mapping.

To use these blocks, right click after selecting all the blocks and make subsystem of them and put the subsystem wherever you want to use with any Simulink model. 

The block is now ready to use for the NMM.

Interplay Between Biology and Technology

We know that biology is the study of life and living organisms with their evolution, function and growth and technology is the collection of the techniques, processes and methods used in the production of any goods such as scientific investigation.  Biology mainly is an investigation to human health related processes. In today’s world, human birth rate is more than the death rate and it is only due to the merging of biology and technology because technology processes the human biology in a better and safer way. So, biotechnology (biology + technology) is the use of living things in any technical application or use of the technical things in particular application of human life. People have used biotechnology in many fields such as food production, agriculture, medicine, genetic engineering and in industries to make chemicals, textiles, papers and Biofuels. 

About biotechnology, we can say that it is the combination of human technology with human intelligence. Biomedical technology is also the part of biotechnology in which technology plays main role as medicine to check and enhance human health with or without the help of a doctor. Our body parts, which are the part of biological study, are tested by the technical equipment using different biomedical signals (i.e. electrocardiogram, electroencephalogram, electrooculography, carotid pulse, phonocardiogram, and speech signals) that are generated by our body. Nanotechnology (Nano Science + Technology) also play a vital role in developing medicines and equipment which increase the human health rate.

Today’s bio-technical devices (healthcare devices) are easily available in the market due to their low cost and effectiveness in measurement of every health related problems. According to the healthcare device indications, our body can be checked up by the doctor when required otherwise we can take required medicines to overcome our body issues. In these days, problems in the human health are increasing due to pollution and low nutrient food. Only due to the advancement in the biotechnology, average age of human living is increased that makes biotechnology more important in the lives of people.

An Edge to VLSI Implementation of Digital Signal Processing Algorithms

The implementation of digital signal processing algorithms and availability of the digital systems have become more widespread since last two decades due to easy availability of digital systems. Earlier analog processors were used to perform the signal processing due to unavailability of digital processors.

The digital signal processing became feasible to be performed in real time in the recent times due to hardware implementation of the algorithms developed in signal processing. It is all because of the requirement of higher level computations in the signal processing especially for the real time applications.

The demands for the high level computation systems combined with the performance of the VLSI architectures which led to the development of VLSI Digital signal processors such as TMS320(1982) and DSP56001(1987). The developers are left with enormous specific architectures of DSP with the ease in development of VLSI designs.

The most common and usually employable DSP techniques are the FFT computing, FIR and IIR digital filters. These techniques require the three basic operations i.e. multiplication, storage and addition and these operations can easily be performed with the VLSI oriented architectures for Digital signal processing architectures. 

The architectures developed through the VLSI implementation for DSP applications generally make use of parallel processing, multiprocessing, array processors, RISC i.e. Reduced instruction set and  pipelining for the very high processing.

The architectures developed for the Digital signal processing applications are tested and brought to the real time implementation through VLSI only. The most commonly and preferably used hardware for the implementation of DSP algorithms in VLSI is the FPGA. FPGA implementation of the digital signal processing algorithms makes it possible to develop a VLSI architecture for the high computation processing and multiprocessing at the real time.