6 months industrial internship/training

The field of electronics and communication includes two vast domains which are complete and integrate different disciplines like electronics design, Integrated circuit design, automation, robotics, mobile communication, microwave engineering, RF engineering etc., such a multiplicity in these domains provides a bunch of career options to the students pursuing course in this field. With this much choices and opportunities any one can get a better job and a stable career.

But, the facts are different. A report in a national daily says,”75 percent engineering students in India are unemployable”. The reason behind the situation is the absence of the required skill-set for being employable. Students lack the skills and knowledge they are expected to acquire during their academic course even after practical sessions in college labs and non-customized industrial trainings.

One should think twice before applying for industrial internship or industrial training course keeping in mind that the motive behind training is to “impart practical knowledge, know-how of the industry, work ethics and most importantly the skills required to the trainees”.

Choosing the right place for internship is crucial as it is an opportunity to engage with the profession to which the student aspire in a realistic work environment they also appreciate and understand the practical application of their academic program and work with professional mentors and begin to build networks within their profession.

So, with a proper internship he or she is trained to be job-ready, even before completion of the course, thus increasing the student’s employment prospects.00A0

Tags :  6 months training in VLSI, Verilog Training, System Verilog Training , SPICE Training , FPGA,   Image Processing,  MATLAB Projects Training
 

VLSI training in India

There are many institutes and companies providing training and project guidance in VLSI domain of electronics field. But somehow they leave students in lurch and the electronics student get diverted from their goal and they consider the VLSI domain to be a level harder than their reach. For getting trained in the conceptual filed like VLSI one need to get a peculiar and sharp mindset so that student can choose a particular training institute of VLSI or a VLSI training company. The VLSI field is so much vast as it includes Frontent (Design And Verification), Backend ( Physical Design and Floorplanning), Analog electronics, Rf signals, Mix-mode etc. So nobody wants to put hands in this technology but still there are some institutes or companies standing still to provide training and guidance to the ECE students. VLSI training companies in India are trying to put forward their hands in bringing back the hardware skillsets above the software countries.

Tags:  summer training for ece , Summer training in VLSI, VlSI summer training, VLSI , VLSI backend training

Summer training institute in VLSI

Everybody is found to whisper that the jobs in electronics field are decreasing day by day in India, but do we think the candidate seeking for a job is eligible for any job in core electronics domains?
Answer is crystal clear that the jobs are not declining, but the number of eligible candidates are declining day by day due to lack of technological skills and other essential criteria for jobs as nobody wants to look beyond their textbooks and lectures.
Summer training is the best initiative for (ece) electronics students to draw their attention from textbooks and implement their skills and knowledge in an industry to get a highlight of their future perspectives and cutting edge technologies.

The first and most important thing before going for summer training is the selection of right domain. There are enormous options available for the students to do their summer training such as VLSI summer training, Mtech. Projects for ece , embedded system summer training, live projects based training, VLSI design & education center,  vlsi training company ,  vlsi training institute in india etc. 

 Students having their interest in hardware and core concepts of semiconductor electronics and analog electronics must choose to go for summer training inVLSI. SiliconMentor is a platform for the ECE students to enhance their skills in VLSI domain and make themselves employable. SiliconMentor believes to train the students in VLSI domain and make India a hardware giant instead of running after software as all European countries are doing that right now.

Silicon mentor
(creating value through silicon)

Tags: summer training for ece , Summer training in VLSI, VlSI summer training, VLSI , embedded system summer training

VLSI M.tech Projects

Electronic B.Tech graduate students opt for the M.tech or higher studies only if they have a will to do a research in a particular field or they are intellectually challenged by the technology. There are several domains in which they can pursue their M.tech and higher studies. One of the domain from them is the VLSI (very large scale integration). 

The VLSI domain includes core concepts like semiconductor physics and analog electronics which itself is a challenge for the students and the next hurdle in this domain is the research project i.e. the students are required to do IEEE m.tech research project in their final year of post-graduation.  Such students can not get a way to tackle the problems at their own. They are needed to get a technical guidance and support related to their projects. Some of the students go for frontend (Design and Verification) VLSI projects while a few show interest in Backend projects (Physical Design).

There are a countable number of entities or organizations which provides a depth training on tools and concepts of VLSI. SiliconMentor is an idol stepping stone in entire north India which aims to aspire the students in core VLSI technology and believes in delivering a beneath the concepts knowledge to the students and stands for the VLSI M.tech students as a supporting hand. They provide us with the great hands on tools and knowledge transfer.

Tags : summer training in VLSI,  backend training instiute in vlsi

What is the importance of training in VLSI?

There have been recent doubts and questions about why a fresh engineering graduate and sometimes even experienced engineers have to undergo a paid training/project implementation to be able to land up/shift to a coveted job in core VLSI and closely associated domains like embedded?

Let us try to answer this dilemma/confusion arising in the nubile minds of fresh engineering graduates/recent pass outs.

See we should accept the fact that there exists a huge gap of practical knowledge/hands on expertise between the industry and the academia. This is due to the undeniable fact that what is taught at college level is obsolete or too fundamental to be actually of any help while working at the industry level, whereas the industry expects that whatever manpower they are about to hire will be well versed with the basic concepts and some knowledge about relevant tools and that's the reason we have taken this initiative.

Another point to ponder is that in southern part of India, there are some good VLSI centric academic hubs but in this aspect northern India mainly Delhi/NCR is lacking way behind, irrespective of emergence of sizeable VLSI design industry especially in Delhi/NCR. The number of engineering institutions that have mushroomed in northern part of India in the last 10-12 years is phenomenal. Students passing from those colleges are not aware where should go if they want to take VLSI domain as their preferred carer as they and their parents are reluctant to send them to Bangalore etc.

It has been observed that there are some efforts to provide VLSI training in Delhi/NCR but they are focussing only on specific domain- Frontend (mainly design and verification modelling and coding), which equates to showing only one face of the coin and thus misses out on a comprehensive approach, that is a must for turning out industry ready VLSI skilled manpower. So, after analysing the ground realities we decided to kick start initiatives to provide comprehensive VLSI training targeted for engineering students and in fact related academic institutions in Delhi/NCR region.

Tags : summer training in VLSI, backend training instiute in vlsi, mtech. Vlsi projects, Vlsi design

World's Tiniest FM Transmitter Made From Graphene

A team led by James Hone and Kenneth Shepard at Columbia University in New York has demonstrated a device built from a strip of graphene that can transmit FM radio signals. The device, the team says, is the smallest FM transmitter yet made. 

Many research groups have built graphene transistors that could be used in future RF circuits such as signal processors. Hone and his colleagues decided to test a different radio application for graphene, by building a moving, vibrating, electromechanical device. The team reckons that such graphene-based nanoelectromechanical systems (NEMS) could be more compact and easier to integrate onto chips than silicon MEMS and quartz devices, which are used today to pick up and filter RF signals in smartphones and other gadgets.

To build a graphene transmitter, the team suspended a 2-4 micrometer-long strip of graphene above a metal electrode. By applying a voltage to the electrode, they could draw the strip of graphene down. The resulting strain altered the strip's resonant frequency, tuning it up much as you might tighten a guitar string. By altering the voltage on the gate, the team found they could use the graphene device to generate a frequency-modulated electromagnetic signal. In a paper published this week in Nature Nanotechnology, they report the device could transmit radio signals at 100 MHz, right in the center of the FM band. 

For an aural demonstration, the team queued up the now classic K-pop song "Gangnam Style" on an iPhone and fed it into one of their graphene devices. They picked up the result on a regular FM radio tuner that Hone had brought in from home.

Nanowire Transistors Could Keep Moore’s Law Alive

Gate-All-Around Transistors: In a new design, the transistor channel is made up of an array of vertical nanowires. The gate surrounds all the nanowires, which improves its ability to control the flow of current. Platinum-based source and drain contacts sit at the top and bottom of the nanowires.

The end of Moore’s Law has been predicted again and again. And again and again, new technologies, most recently FinFETs, have dispelled these fears. Engineers may already have come up with the technology that will fend off the next set of naysayers: nanowire FETs (field-effect transistors).


In these nanodevices, current flows through the nanowire or is pinched off under the control of the voltage on the gate electrode, which surrounds the nanowire. Hence, nanowire FETs’ other name: “gate-all-around” transistors. However, because of their small size, single nanowires can’t carry enough current to make an efficient transistor.


The solution, recent research shows, is to make a transistor that consists of a small forest of nanowires that are under the control of the same gate and so act as a single transistor. For example, researchers at Hokkaido University and from the Japan Science and Technology Agency reported last year inNature a gate-all-around nanowire transistor consisting of 10 vertical indium gallium arsenide nanowires grown on a silicon substrate. Although the device’s electrical properties were good, the gate length—a critical dimension—was 200 nanometers, much too large for the tiny transistors needed to power the microprocessors of the 2020s. 


Now two researchers working in France, Guilhem Larrieu of the Laboratory for Analysis and Architecture of Systems, in Toulouse, and Xiang‑Lei Han of the Institute for Electronics, Microelectronics, and Nanotechnology, in Lille,report the creation of a nanowire transistor that could be scaled down to do the job. It consists of an array of 225 doped-silicon nanowires, each 30 nm wide and 200 nm tall, vertically linking the two platinum contact planes that form the source and drain of the transistor. Besides their narrowness, what’s new is the gate: A single 14-nm-thick chromium layer surrounds each nanowire midway up its length. 


That thickness, the gate length, is the key. “The advantage of an all-around gate allows the creation of shorter gates, without loss of control on the current through the channel,” explains Larrieu. “We demonstrated the first vertical nanowire transistor with such a short gate.” An all-around gate will be a must if gate lengths are to get smaller than 10 nm, he says. In that scheme, “the size of the gate depends only on the thickness of the deposited layer; there is no complicated lithography involved,” he adds. 


The nanowires were of an unusual construction. Unlike with most vertical nanowire transistor prototypes, in which the nano wires are grown upward from a substrate, the French duo created their nanowires by starting out with a block of doped silicon and then etching away material to leave nano pillars. In between the pillars, they deposited an insulating layer to about half the pillars’ height. Then they deposited the 14 nm of chromium and filled the remaining space with another insulating layer. “We tried to make the process completely compatible with current technology used in electronics. No new machines will have to be invented,” says Larrieu. The researchers have plans to try to go below 10-nm gate length, and also to use indium gallium arsenide nanowires because of the better electron mobility.


Kelin Kuhn, director of advanced device technology at Intel’s Hillsboro, Ore., location, agrees that all-around gate structures have some key advantages. Of all the CMOS-style advanced devices, they’re generally expected to provide the best gate control for very short channels, she says. 


Davide Sacchetto, a researcher at the École Polytechnique Fédérale de Lausanne, agrees: “The fabrication of the gate is interesting, and you get a small gate length.” However, the advantage is lost if the nanowires are too long—200 nm in this case—and the channel is only a small part of the total length of the nanowire, he says. “Even a difference of 5 nm would make a huge difference in the drain current.” 


Tags : summer training in VLSI, backend training instiute in vlsi, mtech. Vlsi projects, Vlsi design