VLSI Training in Delhi NCR

VLSI training is the most important steps for the students who want to join VLSI industries or higher studies after B.Tech or M.Tech for the research and for those who want job in core electronics companies to settle their life. SiliconMentor has expertise and experience in the field of VLSI domain. Its expertise spans Verilog/SystemVerilog, FPGA, DSP using MATLAB, CMOS logic circuit, their RTL and circuit development, verification& layout using various tools. SiliconMentor targets the bridge between academics and industries because 90% graduates don’t have expertise in specific field and knowledgehow to enter in industries. So VLSI training is necessary to enhance and augment the knowledge in VLSI field. VLSI training has different modules for the different domains in VLSI such as Digital, Analogue, DSP, FPGA, Communication, Frontend and Backend design. In Frontend, we design RTL level and logic level blocks and their verification using Verilog/VHDL and SystemVerilog (tools like Modelsim and Questasim). A Netlist generates after the frontend design and their verification. This Netlist further propagates to the backend team for the circuit level and layout level design and verification using various tools like Cadence Virtuoso, Tanner (S-edit and L-edit), ADS, Cadence Orcad, P-Spice, H-Spice and Microwind. According to the training module, SiliconMentor gives you industries oriented training and also provides you different hand-on-project trainings. In India, two types of VLSI jobs available: 1st is in Frontend (Verilog design and verification) and 2nd in Backend (physical design automation). SiliconMentor makes you expertise in specific field to get your desired job.

VLSI Training in Delhi NCR

 Tags : VLSI Training in Delhi NCR,  MATLAB Projects Training in Delhi NCR , Verilog Training in Delhi NCR 

Author - Deepak Berwal 

(Research Associate at Silicon Mentor)

M.tech Research Projects guidance

Members of Silicon Mentor realise the importance of Mini and Major project that a M.tech student has to undertake and complete to comply as a curriculum pre-requisite. It specially has more significance for M.tech students or PhD students as they need to present a feasible study and simulation results on new design strategy adopted along with performance parameter analysis to substantiate their strategy.

This is how we at Silicon Mentor guide and help students in executing such research projects:

·         Discussion with candidate on sub-domain and subject matter;

·         Selecting a IEEE based topic and explaining the candidate of the underlying concept and exact identification of the problem statement;

·         Assisting synopsis preparation and verifying that it is aligned with problem statement and mentioning the logic that will be adopted to overcome the problem;

·         Searching the closest base paper and other closest prior art through research databases and other technical forums ,such as, IEEE, Research gate, Scribd , to name few and assisting students in chalking out the design strategy;

·         Periodic checking on the WPR (Weekly Progress Report) and the presentations indicating the project implantation flow;

·         Project Training on required tool so that the student can simulate and prove the base paper and study the dependency of circuit or its equivalent functional model on different parameters;

·         Deriving the student out of his comfort zone to develop out of the box thinking while resolving problems abstract as well as tangible, encountered during project execution;

·         Nourishing the ideas of the student and channelizing the ideas to obtain final results (complete the research).

Though we have started recently, we have made quick and innovative strides as in guiding 60 graduate and post graduate research students in sub micron layout, pre-silicon characterisation as part of their research projects in compliance with curriculum requisites, trained more than 45 students in basics and advanced methodologies and tools of VLSI and associated domains.

Author - Varinder Josan 

(Research Associate at Silicon Mentor)

Tags : M.tech Projects , M.tech Paper Publication , M.tech projects Guidance and supports , ieee M.tech Projects .

Levels Of IC Design

The design of integrated circuits (IC) contains the different levels of abstraction . According to the IC design standards we can study the complex circuits at following four levels.

1). Device Physics Level  2). Transistor Level  3). Architecture Level  4). System Level

1). The device physics level describes the device internal behaviour for electric field and charge.

2). Transistor level consist of a group of these devices .

3). Architectural level defines a unit of several building blocks to perform a certain functions.

3). System level consist of the set of subsystems.e.g.  ADC, DAC etc.

In conclusion  one may say that in today's IC industry above four levels are essential to achieve a high performance and low cost device. 

                                                

                                                          

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Power dissipation in CMOS digital circuits

The growing development of CMOS logic VLSI circuits has decreased the circuit size, increased the switching speed , there is one problem associated with this technology that is known as the power dissipation . There are many researchers who are trying to decrease the power consumption of CMOS based digital circuits. The main cause of power dissipation in CMOS based VLSI circuits are divided on the basis of   its working or behavior.

There are mainly two cases of Power dissipation 1) Dynamic power dissipation 2) Static power dissipation. This dynamic power dissipation can be further divided in three parts known as switching power dissipation, short circuit power dissipation and glitching power dissipation. These can be reduced by changing the parameters of the following models:

  switching power

P _switching = α F_operating.V_dd² C_L [for full output swing]

Where F_operating is operating frequency_, V_dd = supply voltage_, C_L= Net load capacitance_, α= switching activity factor of gate.

P _switching = α F_operating V_dd. V_swing C_L [for low voltage swing]

Short circuit power

Pshort circuit = (μC_ox/12) (W/L)(V_dd-2V_th)³τ F_operating

Where  τ = rise/ fall time of the input signal

The static power dissipation occurs because of two reasons: DC current and Transistor leakage current.

   

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World's Tiniest FM Transmitter Made From Graphene

A team led by James Hone and Kenneth Shepard at Columbia University in New York has demonstrated a device built from a strip of graphene that can transmit FM radio signals. The device, the team says, is the smallest FM transmitter yet made. 

Many research groups have built graphene transistors that could be used in future RF circuits such as signal processors. Hone and his colleagues decided to test a different radio application for graphene, by building a moving, vibrating, electromechanical device. The team reckons that such graphene-based nanoelectromechanical systems (NEMS) could be more compact and easier to integrate onto chips than silicon MEMS and quartz devices, which are used today to pick up and filter RF signals in smartphones and other gadgets.

To build a graphene transmitter, the team suspended a 2-4 micrometer-long strip of graphene above a metal electrode. By applying a voltage to the electrode, they could draw the strip of graphene down. The resulting strain altered the strip's resonant frequency, tuning it up much as you might tighten a guitar string. By altering the voltage on the gate, the team found they could use the graphene device to generate a frequency-modulated electromagnetic signal. In a paper published this week in Nature Nanotechnology, they report the device could transmit radio signals at 100 MHz, right in the center of the FM band. 

For an aural demonstration, the team queued up the now classic K-pop song "Gangnam Style" on an iPhone and fed it into one of their graphene devices. They picked up the result on a regular FM radio tuner that Hone had brought in from home.