DESIGN & COMPARISON OF CONVENTIONAL TPG & LP-TPG USING BRAUN ARRAY MULTIPLIER AS CIRCUIT UNDER TEST

Here, we are introducing a LP-TPG (i.e. Low Power Test Pattern Generator, using Low Frequency Shift Register). Also we’d designed a conventional TPG. Now we will use Braun Array Multiplier, using both Ripple carry adder as well as Kogge stone adder. Now in our design, we’ll use outputs of both the test pattern generators as an input to both kinds of multipliers. Our whole architecture has being designed and simulated using MODELSIM SE 6.5 & synthesised on XLINX ISE DESIGN SUITE 13.3. Till now, we are getting four simulation windows as shown below, according to our design model. Further we are trying to implement our whole design on another software QUARTUS II 13.1. So as to analysis that power consumption i.e. static power, dynamic power, on chip power, off chip power in case of LP-TPG will be less than conventional TPG.

 Author - Akash Kumar

       (Research Associate at Silicon Mentor)

Simulation window – Conventional TPG is connected to Braun Array Multiplier, using Ripple carry adder.

Simulation window – LP-TPG is connected to Braun Array Multiplier, using Ripple carry adder.

Simulation window – Conventional TPG is connected to Braun Array Multiplier, using Kogge stone adder

Simulation window – LP-TPG is connected to Braun Array Multiplier, using Kogge stone adder

Design of a Combo Echo and Crosstalk Canceller in One Unit

In purposed design, we are going to design two transmission line. Now through these transmission lines, we will pass two mono signals, outputs of workspace. Then generate a stereo signal, result of crosstalk between these two transmission lines. To generate crosstalk, we are connecting these two transmission lines via a capacitor.
Now, we will first try to remove the echo from our received signal, to get echo free desired signal. And for this purpose Adaptive filter came into action. Now further main dominating factor i.e. crosstalk will also be removed.
Our design is capable of cancelling crosstalk along with echo in NEXT and FEXT, in case of DSL, VDSL, and ADSL communication system.

Author - Rahul Bhardwaj

(Research Associate at Silicon Mentor)

echo n crosstalk canceller in one unit

Importance of M.Tech/M.E Paper Publication

The industry oriented programs in engineering and information technology are increasing day by day. There are many educational degree program in engineering offered by IIT’s/BITS/NIT’s and other educational institutions. The M.Tech (Master of Technology)/M.E in VLSI is one of the prestigious engineering degree program. The Course curriculum for M.Tech/M.E in VLSI is divided as follows: 

Sem-1 Regular subjects + 1 Minor project

Sem-2 Regular subjects + 1 Major project

Sem-3 Regular subjects + Dissertation/Thesis part -1

Sem-4 Dissertation/Thesis part-2 

As, the course curriculum mainly depends on projects and thesis, it needs IEEE based VLSI Projects [According to the impact factor and recent research publication on critical and innovative topics the IEEE known to be the best source for research supporting data].The VLSI thesis/projects are divided in two parts, VLSI front-end projects and VLSI back-end projects. The main motto to describe about M.Tech [VLSI] is to tell you about the importance of paper publication during masters. The importance can be understood with a story:

“Let us suppose you are doing a project/ thesis and you have to show your project description to some of the organization/company that is far away from your home location, in that condition you have two option either you send your whole docs soft copy or send him short summery [1 page] of your work with your online published paper’s link. In the first option most probably the organization would not believe on your project work because each have not much time to read a 100 pages description but if you choose second option then you have to publish you work on line and once your research work shall be on line then anybody may see or access you research paper. Sometimes some big researchers call some bright researchers to work with him by their on line published papers. ”

Therefore the conclusion of the story is the M.Tech paper publication is must and necessary to grab new opportunities in the world of growing technologies. 
                                                                    
                                                       
                                                              Author- Dinesh Chauhan 

      (Research Associate at Silicon Mentor)

                                                

Need for IEEE VLSI Projects

IEEE (Institute of Electrical and Electronics Engineers) is an advanced innovation and technical group of engineers, scientists, developers, physicists, medical doctors and researchers around the world. It has established on 1^st  January, 1963 with the merging of societies AIEE (American Institute of Electrical Engineers) and IRE (Institute of Radio Engineers). IEEE is the world’s largest technical professional association which has now many fields such as electronic, electrical, communication, computing, nanotechnology, bioengineering and robotics. Now IEEE serves 38 societies, transactions, 130 journals and 300 conferences anually. IEEE prefers exact experimental research in specific areas. Research is most important for the student, researcher, professor and engineer. Without research, all those has nothing new to deliver to the world. Studies after the graduation means research. 21^st centuries research is mainly focused on electronics because modern technological world,involves electronics to make things smart and fast. VLSI (Very Large Scale Integration) is the core domain of electronic semiconductor circuits. IEEE research in VLSI is the need of electronic world. Electronics can not move further without a research in VLSI.So IEEE VLSI projects and research papers are needed for the M.Tech and Ph.D students. VLSI is most innovative and interesting field in electronics. VLSI has mainly two types of design steps: Frontend and Backend. In frontend, we design the system and RTL level using HDLs according to the specification of projects or IC and in backend, we design logic, circuit and layout level of the projects. M.Tech, Ph.D and industrial VLSI projects should be new technological oriented to create new electronics world for the upcoming generation.

           Author - Deepak Berwal

           (Research associate at Silicon Mentor)

Click on the links to get the following Projects list :  

  

VLSI projects       Antenna Projects             MATLAB Projects

VLSI ieee projects 2014 guidance and support

Silicon mentor is a hub to guide & backup the Mtech. and PhD students at the time of pursuing their major & mini projects in semiconductor and communication domain. we boost the students in thesis preparation and provide a technical platform for research in the era of VLSI,Embedded Systems, Communication, Semiconductor, Biology and Technology Interface and Electrical and Electronics. Students may also reach us if they are willing for industrial tool specifications such as cadence orcad,Xilinx FPGA implementation(VHDL Verilog HDL),Tanner EDA,Advance Design System(ADS),AVR studio,MATLAB,H-spice,P-spice,Modelism,Network simulator2,Proteaus and many more to follow. Major projects in VLSI & ECE.

The focus research area in which Silicon Mentor provide services is Neural Network, DSP, Video processing, Advance Analog, Low Power Circuit Technique, Standard cell ( Sub-threshold ).

VLSI Projects : Basically VLSI has two phases i.e. Front End & Back End. 

VLSI Front End Projects: Front End includes the digital designing,RTL design(Register Transfer Level),simulation and Design Under Test(DUT) techniques.It consist of various key terms such as verilog,system verilog,SVA,OVM,UVM,PERL,TCL etc. It comprises of concepts like clock,setup & hold time,FSM and RTL optimization. It uses tools like Questa Sim,Modelism,GTK wave,Xilinx,Icarves Verilog. 

VLSI Back End Projects: Back End includes the design verification and fabrication of a digital design. The verification field is a vast and developing filed of semiconductor in India.The verification of a digital design requires highly skilled semiconductor engineers for verifying a digital design. The process of verification is repeated 15-20 times to prevent errors in the design of a particular chip. Tools used in VLSI Back End design are Tanner EDA,  Advance Design System-ADS, Magic, SPICE(H-SPICE, P-SPICE,T-SPICE).

Here are some Projects List which you can see : 

VLSI Projects List

Antenna Projects List

MATLAB Projects List 
 

Brain-computer Interfaces

It’s a very advance concept of forming a virtual link between a human brains and a computer aided external device. Basically this concept of a virtual link formation came into picture, by thinking that one can control his surrounding external devices just by simply giving instructions through his mind. In this concept, one has to wear electronic helmet and this helmet use to sense the brain signals and provide a wireless connectivity between human brain and the corresponding external computer aided devices.
This concept can be very much useful in the medical field. Such that, cases in which a person is paralyzed, even than he can easily convey his message through such interfacing devices. Till now, we stepped a lot in this direction. We can see many electronic gadgets such as heart pacemaker machine, pulse sensing wrist band etc.
Beside medical applications, this concept can be also applied to make our day to day life much easier. For example, this concept can be used in controlling home appliances, just by simply thinking what we want and our interfacing gadget will sense our mind signal and will give command to the corresponding appliance.
Hence we can easily conclude that this particular concept of brain computer interfacing will make a drastic change in the field of technology.

Author - Rahul bhardwaj 

(Research Associate at SiliconMentor)

Brain Compuer interfaces

Design a Single Precision Floating Point Unit

A single precision floating point unit in verilog is introduced. The novelty of a single precision floating point unit is to provide five arithmetic operations: addition, subtraction, multiplication, division, and square root. In top-down design approach, four arithmetic modules: addition/subtraction, multiplication, division, and square root are combined to form a single precision floating point unit. Each module is independent from each other. The modules are realized and validated using verilog simulation in the Modelsim SE 6.5 and synthesis using Xlinx ISE Design Suite 13.3.

The single precision floating point unit implemented, is a 32-bits processing unit which allows arithmetic operations on a floating point numbers. The floating point unit complies fully with IEEE 754 standard.

Author - Akash Kumar 

(Research Associate at SiliconMentor)

single precision Floating Point