Tuesday, June 9, 2015

How to make an FPGA Partially Reconfigurable

Partially reconfiguration means changing the FPGA partially or only the selected part of the FPGA is reconfigured. It can be done in two ways:

i)    Module based partial reconfiguration
Partial reconfiguration on the basis of difference

Module based partial reconfiguration:

In module based reconfiguration we reconfigure on the specific module or only by changing a selected module we can do the partially reconfiguration of our FPGA. The portions of the design to be reconfigured are known as reconfigurable modules. Specific properties and specific layout criteria must be met with respect to a reconfigurable module, FPGA design intending to use partial reconfiguration must be planned and laid out with that in mind.

Partial reconfiguration on the basis of difference:

Partial reconfiguration on the basis of difference is a method of making small changes in an FPGA design, such as changing I/O standards, LUT equations, and block RAM content.


i)    To lessen power or making the design power-efficient.
ii)    Through the JTRS Program, SDRs are becoming a reality for the defense industries as an effective and necessary tool for communication. SDRs assure the JTRS standard by having both a software-reprogrammable operating environment and the ability to support multiple channels and networks simultaneously.
iii)    Partial reconfiguration is useful in a variety of applications across many industries. The aerospace and defense industries have certainly taken advantage of its capabilities.
iv)    Increased system performance. Although a portion of the design is being reconfigured, the rest of the system can keep on to operate. There is no loss of performance or functionality with unaffected portions of a design.
v)    Hardware sharing. Because partial reconfiguration allows you to run multiple applications on a single FPGA, hardware sharing is realized. Benefits include reduced device count, reduced power consumption, smaller boards, and in particular lower costs.

key steps used in Xilinx to make the FPGA partially Reconfigured:

1: First Create Processor Hardware System.
2: Then Create Software Project.
3: After then Create a Plan ahead Project.
4: Defining a Reconfigurable Partition.
5: Adding Reconfigurable Modules.
6: significant the Reconfigurable Partition Region.
7: Running the Design Rule Checker.
 8: Then Create the First Configuration, Implementing, and Promoting.
9: Then Create Other Configurations, and Implementing.
10: Then Run Partial Reconfiguration to Verify Utility.
11: Generating Bit Files.
12: Creating an Image, and Testing.


There are many advantages to make the FPGA reconfigured. only some from them are following:

I)    To make the device more efficient.
II)    To lessen the LUTs of the design by replacing only specific portion.
III)    To lessen power of the design by replacing only specific portion.
IV)    To lessen the delay of the design by replacing only specific portion or a specific module.


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